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Development
Methodology
Today's advanced process and package technologies pose challenges
to SoC, Sip, 3D-IC designers in terms of reliability, cost,
and performance.
UMC has partnered with industry-leading vendors to effectively
address these challenges to offer customer benefits such as
established and verified design rules, verification of low-k
wafer materials and structures, optimized package materials
and parameters, and enhanced reliability performance. Sophisticated
test vehicles are another advantage achieved through UMC's
methodology.
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Customer endorsed qualification
flows and specs

Fig. 1: UMC's methodology to deliver solutions to customers'
packaging needs |
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Verified
Package Solution
UMC also works with world leading packaging houses
to provide silicon proven packaging solutions. Starting from
test-chip and technology development with assembly support through
its packaging partners the silicon proven packaging solutions
can meet the requirements of demanding designs, meet stringent
qualification criteria, and ensure reliability for sophisticated
chips such as those utilizing ultra low-k and low-k dielectric
materials for Cu interconnect. All vendors are ISO9000 certified
and must meet UMC set criteria regarding yields and cycle time.

Fig. 2: UMC's packaging solution development for advanced package
performance & qualities
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Solutions
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Capability
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Bump / Flip Chip
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Solder: 8" & 12" wafer
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150um solder bump pitch
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Wire Bond
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45 & 40um in-line / 50um stagger
/ 50um tri-tier pad pitch,
high pin count
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BOAC
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45nm ultra low-k / 65nm & 90nm
low-k
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MCP / SiP
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Stack die, POP & PIP
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Lead Free Package
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Wire Bond
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Flip Chip
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Fig 3: UMC's solutions to address various packaging challenges
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Test/Package
Partners
UMC's major test and package subcontractors are located in
Taiwan and throughout Asia. The close proximity of UMC's test
and package partners to UMC's own facilities creates synergies
that enable faster service and greater flexibility.
UMC's partners for testing and packaging include: ASE, Amkor,
Ardentec, Global Testing Corp., KYEC, NEPES, SPIL, StatsChipPAC,
UST, UTAC, and Winstek.
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